1. Field of the Invention
The present invention relates to a semiconductor technique, and more particularly to a transfer gate transistor in an image sensor device and a method for forming the same.
2. Description of the Related Art
In the semiconductor technique, an image sensor device is used for sensing light illuminating on the semiconductor substrate. Common image sensor devices include complementary metal-oxide semiconductor image sensors (CIS) and charge-coupled devices (CCD), which can be applied to various applications such as digital cameras. These image sensors utilize a pixel array to receive light, so as to convert the images to digital data. The pixel array may include photodiodes and transistors. So far, types of the CIS include a 3-T architecture and a 4-T architecture. The 3-T architecture may include a reset transistor (RST), a source follower transistor (SF) and a row select transistor (RS). The 4-T architecture may include a transfer gate transistor (TX), a reset transistor, a source follower transistor and a row select transistor.
Until now, performance optimization between image lag and dark current from transfer gate is studying and researching. Such issues, however, could be improved if the gate of the transfer gate transistor had two of different doping regions. Refer to FIG. 1, the interface (junction) 11 between different doping regions in the conventional gate structure 10 is defined by a pattering process, and the interface 11 is thus often shifted due to subsequent processes. Therefore, the pixels in the same pixel array have different interface 11 position, respectively. Such inconsistent interface positions may result in the generation of noise.
Therefore, a novel method for accurately defining the position of the interface between different doping regions in the transfer gate transistor of the image sensor is desired, so as to solve or mitigate the aforementioned problems.